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Authored by: BitOBear on Friday, July 20 2012 @ 05:12 PM EDT |
With PROM memory, and with the write-once Gate Arrays, where the programming
voltage actually destroys parts of the original circuit things -do- get a little
iffy.
But in this case, programming is actually more properly the final manufacturing
step.
Argument:
(1) The delivered device is a "blank", incapable of operation.
(2) The device is placed in a "programmer" where the blank is
"machined" by the controlled application of voltages designed to
melt/destroy internal elements to create the "target machine" out of
the "blank".
(3) The device is then removed from the programmer and installed in its
functional position (so function and programming are mutually exclusive modes).
So the prom devices are actually not programmable in the general sense.[ Reply to This | Parent | # ]
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- Aha! - Authored by: Ian Al on Saturday, July 21 2012 @ 04:14 AM EDT
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Authored by: tiger99 on Friday, July 20 2012 @ 05:27 PM EDT |
It may be a minor nit, as we probably represent 0.001% of the FPGA design
community, but in a certain class of safety critical work the FPGA code is
specifically restricted to the lowest level, RTL, or register transfer logic, so
that the final result achieved by the routing tools will be exactly the same as
that prepared by an independent tool. The two are compared for verification, and
differences are not allowed, so we do know exactly which gate in the FPGA is
being used for what function, if we care to delve into the fuse map.[ Reply to This | Parent | # ]
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